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 STP120NF04
N-channel 40V - 0.0047 - 120A TO-220 STripFETTM II MOSFET
General features
Type STP120NF04

VDSS 40V
RDS(on) <0.0050
ID 120A
Pw 300W
Standard threshold drive 100% avalanche tested
3 1 2
Description
This MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
TO-220
Internal schematic diagram
Applications
Switching application
Order codes
Part number STP120NF04 Marking P120NF04 Package TO-220 Packaging Tube
October 2006
Rev 2
1/14
www.st.com 14
Contents
STP120NF04
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
3 4 5
Test circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STP120NF04
Electrical ratings
1
Electrical ratings
Table 1.
Symbol VDS VGS ID
(1)
Absolute maximum ratings
Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 40
Unit V V A A A W W/C V/ns J C
20
120 120 480 300 2 6 1.2 -55 to 175
ID IDM(2) PTOT dv/dt(3) EAS(4) TJ Tstg
Peak diode recovery voltage slope Single pulse avalanche energy Operating junction temperature Storage temperature
1. Current Limited by Package 2. Pulse width limited by safe operating area 3. ISD 120A, di/dt 300A/s, VDD V(BR)DSS, Tj TJMAX. 4. Starting Tj = 25C, Id = 60A, VDD=30 V
Table 2.
Rthj-case Rthj-pcb Rthj-a Tl
Thermal data
Thermal resistance junction-case Max Thermal resistance junction-pcb Max Thermal resistance junction-ambient (free air) Max Maximum lead temperature for soldering purpose 0.5 see Figure 14. on page 8 62.5 300 C/W C/W C/W C
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Electrical characteristics
STP120NF04
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 3.
Symbol V(BR)DSS
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V VDS = VGS, ID = 250A VGS = 10V, ID = 50 A 2.8 Min. 40 1 10 100 4.5 0.0047 0.0050 Typ. Max. Unit V A A nA V
IDSS
IGSS VGS(th) RDS(on)
Table 4.
Symbol gfs
(1)
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time rise time Turn-off delay time fall time Total gate charge Gate-source charge Gate-drain charge Test conditions VDS =15V, ID = 50A Min. Typ. 150 5100 1300 160 35 220 80 50 110 35 35 150 Max. Unit S pF pF pF ns ns ns ns nC nC nC
Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd
VDS =25V, f=1 MHz, VGS=0
VDD = 20 V, ID = 60 A, RG = 4.7 , VGS = 10 V (see Figure 18) VDD = 20 V, ID = 60 A, RG = 4.7 , VGS = 10 V (see Figure 18) VDD=32V, ID = 120A VGS =10V (see Figure 19)
1. Pulsed: pulse duration=300s, duty cycle 1.5%
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STP120NF04
Electrical characteristics
Table 5.
Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=120A, VGS=0 ISD=120A, di/dt = 100A/s, VDD=20V, Tj=150C (see Figure 20) 75 185 5 Test conditions Min Typ. Max 120 480 1.3 Unit A A V ns nC A
1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300s, duty cycle 1.5%
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Electrical characteristics
STP120NF04
2.1
Figure 1.
Electrical characteristics (curves)
Safe operating area Figure 2. Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
6/14
STP120NF04 Figure 7. Gate charge vs gate-source voltage Figure 8.
Electrical characteristics Capacitance variation
Figure 9.
Normalized gate threshold voltage vs temperature
Figure 10. Normalized BVDSS vs temperature
Figure 11. Normalized on resistance vs temperature
Figure 12. Source-drain diode forward characteristics
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Electrical characteristics
STP120NF04
Figure 13. Power derating vs Tc
Figure 14. Thermal resistance Rthj-a vs PCB copper area
Figure 15. Max id current vs Tc
Figure 16. Max power dissipation vs PCB copper area
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STP120NF04 Figure 17. Allowable Iav vs time in avalanche
Electrical characteristics
The previous curve gives the safe operating area for unclamped inductive loads, single pulse or repetitive, under the following conditions: PD(AVE) =0.5*(1.3*BVDSS *IAV ) EAS(AR) =PD(AVE) *tAV Where: IAV is the allowable current in avalanche PD(AVE) is the average power dissipation in avalanche (single pulse) tAV is the time in avalanche To derate above 25 C, at fixed IAV, the following equation must be applied: IAV = 2 * (Tjmax - TCASE) / (1.3 * BVDSS * Zth) Where: Zth = K * Rth is the value coming from Normalized Thermal Response at fixed pulse width equal to TAV.
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Test circuit
STP120NF04
3
Test circuit
Figure 19. Gate charge test circuit
Figure 18. Switching times test circuit for resistive load
Figure 20. Test circuit for inductive load Figure 21. Unclamped Inductive load test switching and diode recovery times circuit
Figure 22. Unclamped inductive waveform
Figure 23. Switching time waveform
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STP120NF04
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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Package mechanical data
STP120NF04
TO-220 MECHANICAL DATA
DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154
oP
Q
12/14
STP120NF04
Revision history
5
Revision history
Table 6.
Date 28-Feb-2005 02-Oct-2006
Revision history
Revision 1 2 First release. New template, no content change Changes
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STP120NF04
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